About Us

Hekratos B.V is a European and Dutch based, authorized microchip design services management company, supporting our worldwide clients in their quest to develop tailor-made and application specific microchips. Ideal for solution integrators within a wide range of markets.

One-stop Solutions

Design & Verification

Delve into the heart of innovation with Design & Verification, where meticulous planning meets rigorous testing. Unleash the potential of seamless product development through precise design and thorough verification processes.

  • Specification definition
  • Architecture development
  • RTL design and verification
  • EMU FPGA prototype

Middle-end and back-end

Explore the transformative phases of Middle-end and back-end, where conceptual designs evolve into functional realities. Harness the power of intricate processing and optimization to bring forth the backbone of advanced systems.

  • Synthesis, DFT, back-end
  • Complete design flow
  • Strict project management mechanism
  • Achieve PPA targets quickly with high quality.

Packaging & Testing

Dive into the realm of Packaging & Testing, where product integrity meets meticulous quality assurance. Navigate the final stages of production with precision, ensuring robust packaging and thorough testing for reliable end-to-end solutions.

  • Packaging design
  • CP & FT development and support
  • Load board & Prob card service

EDA/ IP

Explore the dynamic landscape of EDA/IP, where cutting-edge tools and intellectual property converge. Unlock innovation through advanced design methodologies, shaping the foundation for transformative electronic solutions.

  • Professional EDA environment build-up
  • Customized circuit design/analog design support
  • IT infrastructure construction

One-stop Solutions

Design & Verification

Delve into the heart of innovation with Design & Verification, where meticulous planning meets rigorous testing. Unleash the potential of seamless product development through precise design and thorough verification processes.

  • Specification define
  • Architecture develop
  • RTL design and verification
  • EMU FPGA prototype

Middle-end and back-end

Explore the transformative phases of Middle-end and back-end, where conceptual designs evolve into functional realities. Harness the power of intricate processing and optimization to bring forth the backbone of advanced systems.

  • Synthesis, DFT, back-end
  • Complete design flow
  • Strict project management mechanism
  • Achieve PPA targets quickly with high quality.

Packaging & Testing

Dive into the realm of Packaging & Testing, where product integrity meets meticulous quality assurance. Navigate the final stages of production with precision, ensuring robust packaging and thorough testing for reliable end-to-end solutions.

  • Packaging design
  • CP & FT development and support
  • Load board & Prob card service

EDA/ IP

Explore the dynamic landscape of EDA/IP, where cutting-edge tools and intellectual property converge. Unlock innovation through advanced design methodologies, shaping the foundation for transformative electronic solutions.

  • Professional EDA environment build-up
  • Customized circuit design/analog design support
  • IT infrastructure construction

Design Strategy

1

Design

Platform.

IC model:
according to the architectural characteristics of multi-core soc, build a topological model for the system bus interconnection network, and develop a highly flexible and reusable system-level verification scenario.

EMU:
hardware acceleration platform, which can open configuration data link 100 times faster than simulation speed, and build bare-metal test based on characteristics to facilitate subsequent delivery to software application test.

Autogen:
Automated scripts make the verification expansion from 1 to n more comprehensive and accurate.

FPGA:
Prototype platform, close to the real product rate, focusing on stress testing and application scenario testing based on operating system.

2

Advanced

Concepts.

Tractility:
Rich hierarchical support from IP verification to pre-silicon prototype development, from architecture definition, performance simulation to mass production test pattern, from single project to multi-project parallel;

Succession:
The bottom IP test sequence is inherited upward, each detection coverage point is used upward, the debug scene is reversed and reproduced forward, and the process standardization ensures seamless inheritance between projects;

Varity:
rich and powerful set of general environment libraries, which is convenient for configuration and reuse, adapts different sources of model/VIP to a unified verification and integration process, and supports all the verification work of any IP from the bottom to the top;

3

Our

Structure.

Standard process is the guarantee of quality.

Design Strategy

1

Design Platform.

IC model:
according to the architectural characteristics of multi-core soc, build a topological model for the system bus interconnection network, and develop a highly flexible and reusable system-level verification scenario.

EMU:
hardware acceleration platform, which can open configuration data link 100 times faster than simulation speed, and build bare-metal test based on characteristics to facilitate subsequent delivery to software application test.

Autogen:
Automated scripts make the verification expansion from 1 to n more comprehensive and accurate.

FPGA:
Prototype platform, close to the real product rate, focusing on stress testing and application scenario testing based on operating system.

2

Advanced Concepts.

Tractility:
Rich hierarchical support from IP verification to pre-silicon prototype development, from architecture definition, performance simulation to mass production test pattern, from single project to multi-project parallel;

Succession:
The bottom IP test sequence is inherited upward, each detection coverage point is used upward, the debug scene is reversed and reproduced forward, and the process standardization ensures seamless inheritance between projects;

Varity:
rich and powerful set of general environment libraries, which is convenient for configuration and reuse, adapts different sources of model/VIP to a unified verification and integration process, and supports all the verification work of any IP from the bottom to the top;

3

Our Structure.

Standard process is the guarantee of quality.

Contact us

Unlock limitless possibilities with Hekratos B.V., your trusted partner in custom microchip design solutions. Contact us today to transform your visions into cutting-edge realities.

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